OSV 1.4.0 · unreviewed · 修改于 2026-09-03 23:32
发布时间
2026-09-03 23:32
GitHub 审查时间
—
NVD 发布时间
2026-09-03 21:06
源文件
advisories/unreviewed/2026/09/GHSA-5fmr-wwgg-gfqm/GHSA-5fmr-wwgg-gfqm.json
In the Linux kernel, the following vulnerability has been resolved:
x86/mce: Set up the polling timer before CMCI discovery
I hit the following on one of my machines:
mce: CPU0 BANK15 CMCI inherited storm ------------[ cut here ]------------ ODEBUG: assert_init not available (active state 0) object: (ptrval) object type: timer_list hint: 0x0 WARNING: lib/debugobjects.c:632 at debug_object_assert_init+0x178/0x230, CPU#0: swapper/0/0 CPU: 0 UID: 0 PID: 0 Comm: swapper/0 Not tainted 7.2.0-rc5 #3 PREEMPTLAZY RIP: 0010:debug_object_assert_init+0x18f/0x230 Call Trace: <TASK> __mod_timer mce_timer_kick cmci_discover intel_init_cmci mce_intel_feature_init mcheck_cpu_init identify_cpu identify_boot_cpu arch_cpu_finalize_init start_kernel
A second splat follows right after, from timer_setup() finding that same timer already queued:
ODEBUG: init active (active state 0) object: (ptrval) object type: timer_list hint: stub_timer+0x0/0x10
This is happening because CMCI storm detection is trying to modify the timer before latter was properly set up.
Set up the timer first. __mcheck_cpu_setup_timer() only calls timer_setup(), and depends on neither the generic nor the vendor init.
[ bp: Massage commit message. ]
该公告没有提供结构化的受影响软件包信息。